UltraScale and UltraScale+ GTH Transceivers
| Getting Started | Design Resources | Support Resources | Transceiver IP Resources |
Refer to the High Speed Serial Product Page for more information on Xilinx GTY Transceivers.
| High-Speed Serial I/O Designer's Guide | Date |
|---|---|
 Basic Concepts | |
| Purpose of SERDES | |
| History of SERDES | |
| Alignment, Encoding, Emphasis, Buffers, Channel Bonding and Clock Correction | |
| UltraScale GTH Transceivers User Guide | Date |
| UG576 - RX Byte and Word Alignment | 08/18/2021 |
| UG576 - RX 8B/10B Decoder | 08/18/2021 |
| UG576 - Buffer Control | 08/18/2021 |
| UG576 - RX Clock Correction | 08/18/2021 |
| UG576 - RX Channel Bonding | 08/18/2021 |
| UG576 - RX Synchronous Gearbox | 08/18/2021 |
| UG576 - RX Clock Data Recovery (CDR) | 08/18/2021 |
Product Specifications
The characterization reports for UltraScale and UltraScale+ devices are confidential. Please contact a Xilinx Specialist for more information.
| Supported Protocols | Date |
|---|---|
| DS922 - Kintex UltraScale+ - GTH Transceiver Protocol List | 02/16/2021 |
| DS893 - Virtex UltraScale - GTH Transceiver Protocol List | 05/23/2019 |
| DS892 - Kintex UltraScale - GTH Transceiver Protocol List | 09/22/2020 |
| Max Data Rates | Date |
| DS922 - Kintex UltraScale+ - GTH Transceiver Performance | 02/16/2021 |
| DS893 - Virtex UltraScale - GTH Transceiver Performance | 05/23/2019 |
| DS892 - Kintex UltraScale - GTH Transceiver Performance | 09/22/2020 |
UltraScale Transceiver Wizard
Refer to the UltraScale FPGAs Transceivers Wizard IP Product Page for more information regarding this IP.
| Using the Wizard IP Core | Date |
|---|---|
 AR70679 - UltraScale Transceiver Wizard - Release Notes and Known Issues | |
| PG182 - Overview | 12/04/2020 |
| PG182 - Designing with the Core | 12/04/2020 |
| PG182 - Design Flow Steps | 12/04/2020 |
| PG182 - Example Design | 12/04/2020 |
| PG182 - Test Bench Usage | 12/04/2020 |
Understanding GT Transceiver Features
| Determining Latency | Date |
|---|---|
| AR68177 - UltraScale+ GTH Transceiver: TX and RX Latency Values | |
| AR64309 - UltraScale GTH Transceiver: TX and RX Latency Values | |
| Rate Changing | Date |
| AR70485 - UltraScale+ GTH/GTY - How to Update CPLL Calibration Settings During a Rate Change | |
| Frequently Asked Questions (FAQ) | Date |
| AR62670 - UltraScale FPGAs GTH Transceiver - Known Issues and Answer Record List |
