AMD APAC Functional Safety Working Group 2023
We are excited to announce the first AMD APAC Functional Safety Working Group (FSWG) in Tokyo this summer. This event provides an excellent opportunity for professionals from the Industrial, Automotive, and Avionics industries, academic representatives, certification authorities, and AMD Alliance Members to gather and exchange the latest insights on Functional Safety topics.
The AMD Functional Safety Working Group provides an excellent forum for participants to learn from AMD functional safety leaders and where attendees can connect with their functional safety peers in the industry. Attendees will develop a better understanding of the industry’s safety requirements for today and tomorrow and learn about innovative and unique solutions coming from AMD.
This event is free of charge. Don’t miss the chance to explore our latest technology innovations, connect with industry peers and stay ahead of the curve!
Register now to reserve your spot!
Event: AMD APAC Functional Safety Working Group 2023
Date: 13 - 14 July, 2023
Location: Shinagawa Season Terrace (Tokyo, Japan)
*ALL PARTICIPANTS WILL REQUIRE CURRENT NDA AGREEMENTS WITH AMD.
If you have any questions about the event, feel free to contact j_events@amd.com
Schedule & Presentations
13 July, 2023
| Time | Topic |
|---|---|
| 08:15 - 09:15 | Sign-in |
| 09:15 - 10:30 | Welcome & State of the Union |
| 10:30 - 11:00 | Quality & Reliability |
| 11:00 - 11:15 | - Break - |
| 11:15 - 12:15 | Zynq™ UltraScale+™ LPD Functional Safety Solution |
| 12:15 - 13:15 | - Lunch - |
| 13:15 - 14:00 | Zynq UltraScale+ FPD Functional Safety Solution |
| 14:00 - 14:45 | Zynq UltraScale+ FPD STL Reference Design |
| 14:45 - 15:30 | Zynq UltraScale+ PL Functional Safety Solutions |
| 15:30 - 15:45 | - Break - |
| 15:45 - 16:30 | Zynq UltraScale+ ISO 13849 Solution |
| 16:30 - 17:15 | ZU+ PS & PL Isolation Techniques |
| 17:15 - 18:00 | ZU+ Functional Safety Design Example |
| 18:00 - 18:15 | - Break - |
| 18:15 - 20:00 | Social Event |
14 July, 2023
| Time | Topic |
|---|---|
| 08:15 - 09:15 | Sign-in |
| 09:15 - 10:15 | Versal™ Architecture Overview |
| 10:15 - 11:15 | Versal - Functional Safety Capabilities in Infrastructure Components |
| 11:15 - 11:30 | - Break - |
| 11:30 - 12:15 | Versal - Functional Safety Capabilities in Real Time Channel |
| 12:15 - 13:15 | - Lunch - |
| 13:15 - 14:00 | Versal - Functional Safety Capabilties in Application Channel |
| 14:00 - 15:00 | Versal - Functional Safety in Acceleration Channel |
| 15:00 - 15:45 | Security in Functional Safety Applications |
| 15:45 - 16:00 | - Break - |
| 16:00 - 16:45 | DFX & IDF in Safety Critical Applications |
| 16:45 - 17:15 | Safety Solutions Roadmap & Wrapup |
| 17:15 - 17:30 | Wrapup of FSWG'23 |
| Presentation title | Description |
|---|---|
| Welcome & State of the Union | This session will introduce those of you that are new to our Functional Safety to the Silicon, Software, IP and Documentation that comprise the Safety focus at AMD. Those that have been introduced to the Safety Solutions previously will get a brief update on progress made and all will be provided with a roadmap of future development for these foundational technologies. |
| Quality & Reliability | This session will provide an overview of AMD AECG development process (HW/SW) and reliability monitor and permanent faults for the safety lifecycle. We will explain our approaches to testing, characterization, qualification and subsequent analysis methodologies. We will explain how we introduce our product solution to meet most stringent quality, safety and long-term reliability through a robust New Product Introduction (NPI) methodology. |
| Zynq™ UltraScale+™ LPD Functional Safety Solution | This session provides an overview of the hardware and software safety mechanisms in ZynqTM Ultrascale+TM Lower Power Domain, inlcuding the details of the Platform Management Controller and the Software Test Libraries. |
| Zynq UltraScale+ FPD Functional Safety Solution | During the development of the ZU+ FPD safety soluction, several HW & SW assumptions were made to achieve the safety targets in FPD. This session provides an overview of these AoU. |
| Zynq UltraScale+ FPD STL Reference Design | This sessions provides an over of an example reference design that demonstrates the integration & application level performance impact of integrating FPD software test libraries in a high level operating system like Linux. |
| Zynq UltraScale+ PL Functional Safety Solutions | To enable functional safety applications in PL, AMD provides several solution elements. This session provides and overview of various HW, IP & methodologies that AMD provides to users to develop & certify their functional safety applications. |
| Zynq UltraScale+ ISO 13849 Solution | The purpose of this section is to act as a guide for anyone concerned with applying ZynqTM Ultrascale+TM for machine safety. The session will cover the mapping of ZynqTM Ultrascale+TM IEC61508 HFT=1 certification into the ISO13849, and the roadmap for the compliance assessment with a Technical Report issued by TUV. |
| ZU+ PS & PL Isolation Techniques | AMD provides several solutions to achieve isolation in PL domain. This session provides an overview of different hardware, IP & methodologies to help achieve isolation in PL designs. |
| ZU+ Functional Safety Design Example | Using an automotive safety application as an example, this sessions provides a safety concept overview to achieve functional safety targets using ZynqTM UltraScale+TM devices across LPD, FPD & PL. |
| Versal™ Architecture Overview | This session is a technical deep dive of Versal FuSa Concept, Architecture and an overview of the Safety Mechanisms implemented in hardware. It will also provide an overview of assumptions of use that needs to be considered while integrating VersalTM at system level. |
| Versal - Functional Safety Capabilities in Infrastructure Components | Versal includes several blocks that are shared across LPD, FPD & PL and these blocks are called infrastructure blocks/components. This session provides details of the functional safety capabilities in these blocks. |
| Versal - Functional Safety Capabilities in Real Time Channel | This session is a technical deep dive of the functional safety capabilities in the Real Time channel of Versal. This session covers the HW capabilties and the Software Test Libraries (STLs) from AMD to achieve functional safety targets in real time channel. |
| Versal - Functional Safety Capabilties in Application Channel | Application channel includes several hardware safety measures to help achieve the functional safety targets of the application. This session provides details of these hardware capabilities and also covers the software test libraries that AMD is developing to help meet the functional safety targets of the application in FPD. |
| Versal - Functional Safety in Acceleration Channel | This channel covers the HW & SW solutions, from AMD to help achieve the safety targets in AI Engines & PL. |
| Security in Functional Safety Applications | Safety critical systems are not safe if they are not secure. A system which is vulnerable to modification can no longer trust the safety mechanisms to operate as intended. This session will explore the security capabilities of the VersalTM & ZynqTM UltraScale+TM MPSoC as they relate to Industrial (IEC62443) and Automotive (e.g. Hardware Security Module) security initiatives. |
| DFX & IDF in Safety Critical Applications | This presentation will introduce the user to the following: Dynamic Function eXchange (DFX) Value of DFX in Automotive Isolation Design Flow (IDF) Value of IDF in Automotive Combined IDF + DFX Methodology Demonstration Video |
| Safety Solutions Roadmap & Wrapup | This presentation provides an overview of the various FuSa solutions that AMD is developing. It also provides an overview of the capabilities of the next generation solutions. |
Note: The agenda is subject to change. All sessions will be delivered in English.